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Espressif Systems /ESP32 /SLCHOST /HOST_SLC1HOST_INT_CLR

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Interpret as HOST_SLC1HOST_INT_CLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HOST_SLC1_TOHOST_BIT0_INT_CLR)HOST_SLC1_TOHOST_BIT0_INT_CLR 0 (HOST_SLC1_TOHOST_BIT1_INT_CLR)HOST_SLC1_TOHOST_BIT1_INT_CLR 0 (HOST_SLC1_TOHOST_BIT2_INT_CLR)HOST_SLC1_TOHOST_BIT2_INT_CLR 0 (HOST_SLC1_TOHOST_BIT3_INT_CLR)HOST_SLC1_TOHOST_BIT3_INT_CLR 0 (HOST_SLC1_TOHOST_BIT4_INT_CLR)HOST_SLC1_TOHOST_BIT4_INT_CLR 0 (HOST_SLC1_TOHOST_BIT5_INT_CLR)HOST_SLC1_TOHOST_BIT5_INT_CLR 0 (HOST_SLC1_TOHOST_BIT6_INT_CLR)HOST_SLC1_TOHOST_BIT6_INT_CLR 0 (HOST_SLC1_TOHOST_BIT7_INT_CLR)HOST_SLC1_TOHOST_BIT7_INT_CLR 0 (HOST_SLC1_TOKEN0_1TO0_INT_CLR)HOST_SLC1_TOKEN0_1TO0_INT_CLR 0 (HOST_SLC1_TOKEN1_1TO0_INT_CLR)HOST_SLC1_TOKEN1_1TO0_INT_CLR 0 (HOST_SLC1_TOKEN0_0TO1_INT_CLR)HOST_SLC1_TOKEN0_0TO1_INT_CLR 0 (HOST_SLC1_TOKEN1_0TO1_INT_CLR)HOST_SLC1_TOKEN1_0TO1_INT_CLR 0 (HOST_SLC1HOST_RX_SOF_INT_CLR)HOST_SLC1HOST_RX_SOF_INT_CLR 0 (HOST_SLC1HOST_RX_EOF_INT_CLR)HOST_SLC1HOST_RX_EOF_INT_CLR 0 (HOST_SLC1HOST_RX_START_INT_CLR)HOST_SLC1HOST_RX_START_INT_CLR 0 (HOST_SLC1HOST_TX_START_INT_CLR)HOST_SLC1HOST_TX_START_INT_CLR 0 (HOST_SLC1_RX_UDF_INT_CLR)HOST_SLC1_RX_UDF_INT_CLR 0 (HOST_SLC1_TX_OVF_INT_CLR)HOST_SLC1_TX_OVF_INT_CLR 0 (HOST_SLC1_RX_PF_VALID_INT_CLR)HOST_SLC1_RX_PF_VALID_INT_CLR 0 (HOST_SLC1_EXT_BIT0_INT_CLR)HOST_SLC1_EXT_BIT0_INT_CLR 0 (HOST_SLC1_EXT_BIT1_INT_CLR)HOST_SLC1_EXT_BIT1_INT_CLR 0 (HOST_SLC1_EXT_BIT2_INT_CLR)HOST_SLC1_EXT_BIT2_INT_CLR 0 (HOST_SLC1_EXT_BIT3_INT_CLR)HOST_SLC1_EXT_BIT3_INT_CLR 0 (HOST_SLC1_WIFI_RX_NEW_PACKET_INT_CLR)HOST_SLC1_WIFI_RX_NEW_PACKET_INT_CLR 0 (HOST_SLC1_HOST_RD_RETRY_INT_CLR)HOST_SLC1_HOST_RD_RETRY_INT_CLR 0 (HOST_SLC1_BT_RX_NEW_PACKET_INT_CLR)HOST_SLC1_BT_RX_NEW_PACKET_INT_CLR

Fields

HOST_SLC1_TOHOST_BIT0_INT_CLR
HOST_SLC1_TOHOST_BIT1_INT_CLR
HOST_SLC1_TOHOST_BIT2_INT_CLR
HOST_SLC1_TOHOST_BIT3_INT_CLR
HOST_SLC1_TOHOST_BIT4_INT_CLR
HOST_SLC1_TOHOST_BIT5_INT_CLR
HOST_SLC1_TOHOST_BIT6_INT_CLR
HOST_SLC1_TOHOST_BIT7_INT_CLR
HOST_SLC1_TOKEN0_1TO0_INT_CLR
HOST_SLC1_TOKEN1_1TO0_INT_CLR
HOST_SLC1_TOKEN0_0TO1_INT_CLR
HOST_SLC1_TOKEN1_0TO1_INT_CLR
HOST_SLC1HOST_RX_SOF_INT_CLR
HOST_SLC1HOST_RX_EOF_INT_CLR
HOST_SLC1HOST_RX_START_INT_CLR
HOST_SLC1HOST_TX_START_INT_CLR
HOST_SLC1_RX_UDF_INT_CLR
HOST_SLC1_TX_OVF_INT_CLR
HOST_SLC1_RX_PF_VALID_INT_CLR
HOST_SLC1_EXT_BIT0_INT_CLR
HOST_SLC1_EXT_BIT1_INT_CLR
HOST_SLC1_EXT_BIT2_INT_CLR
HOST_SLC1_EXT_BIT3_INT_CLR
HOST_SLC1_WIFI_RX_NEW_PACKET_INT_CLR
HOST_SLC1_HOST_RD_RETRY_INT_CLR
HOST_SLC1_BT_RX_NEW_PACKET_INT_CLR

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data